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@ -61,8 +61,10 @@ |
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#define REG_FREQ_ERROR_LSB 0x2a |
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#define REG_RSSI_WIDEBAND 0x2c |
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#define REG_DETECTION_OPTIMIZE 0x31 |
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#define REG_HIGH_BW_OPTIMIZE_1 0x36 |
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#define REG_DETECTION_THRESHOLD 0x37 |
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#define REG_SYNC_WORD 0x39 |
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#define REG_HIGH_BW_OPTIMIZE_2 0x3a |
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#define REG_DIO_MAPPING_1 0x40 |
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#define REG_VERSION 0x42 |
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#define REG_PA_DAC 0x4d |
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@ -460,6 +462,8 @@ void LoRaClass::setFrequency(long frequency) { |
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writeRegister(REG_FRF_MSB, (uint8_t)(frf >> 16)); |
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writeRegister(REG_FRF_MID, (uint8_t)(frf >> 8)); |
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writeRegister(REG_FRF_LSB, (uint8_t)(frf >> 0)); |
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optimizeModemSensitivity(); |
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} |
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uint32_t LoRaClass::getFrequency() { |
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@ -526,6 +530,21 @@ void LoRaClass::handleLowDataRate(){ |
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} |
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} |
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void LoRaClass::optimizeModemSensitivity(){ |
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byte bw = (readRegister(REG_MODEM_CONFIG_1) >> 4); |
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uint32_t freq = getFrequency(); |
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if (bw == 9 && 410E6 <= freq <= 525E6) { |
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writeRegister(REG_HIGH_BW_OPTIMIZE_1, 0x02); |
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writeRegister(REG_HIGH_BW_OPTIMIZE_2, 0x7f); |
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} else if (bw == 9 && 862E6 <= freq <= 1020E6) { |
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writeRegister(REG_HIGH_BW_OPTIMIZE_1, 0x02); |
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writeRegister(REG_HIGH_BW_OPTIMIZE_2, 0x64); |
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} else { |
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writeRegister(REG_HIGH_BW_OPTIMIZE_1, 0x03); |
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} |
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} |
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void LoRaClass::setSignalBandwidth(long sbw) |
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{ |
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int bw; |
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@ -555,6 +574,7 @@ void LoRaClass::setSignalBandwidth(long sbw) |
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writeRegister(REG_MODEM_CONFIG_1, (readRegister(REG_MODEM_CONFIG_1) & 0x0f) | (bw << 4)); |
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handleLowDataRate(); |
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optimizeModemSensitivity(); |
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} |
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void LoRaClass::setCodingRate4(int denominator) |
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