Tag: Branch: Tree: 51afd310a5

master

Branches Tags

${ item.name }

Create tag ${ searchTerm }

Create branch ${ searchTerm }

from '51afd310a5'

${ noResults }

Commit Graph

14 Commits (51afd310a5e84102b96f2cd8a5411d041c1fe425)

Author	SHA1	Message	Date
jacob.eva	51afd310a5	Revert to ISR handling packets and cap SX1280 data rate	6 months ago
jacob.eva	c3c254cd96	Change interrupt layout and address SX1280 errata	6 months ago
jacob.eva	c9fd5f7d3b	Add support for retrieving packet length on implicit header	6 months ago
jacob.eva	81aff16c2d	Fix race condition on multiple interfaces receiving at once	6 months ago
jacob.eva	721cee3603	Fix SPI semaphore lockup issue on ESP32	7 months ago
jacob.eva	003aab4072	Fix issue with SX1280 TX power not being set properly	7 months ago
jacob.eva	ba2d36add9	Switch from board variant being set separately to using model number instead.	8 months ago
jacob.eva	35e9f36ffd	Add T3S3 target and different variants of the board	8 months ago
jacob.eva	12697f194d	Fix compiler warnings	8 months ago
jacob.eva	007dfd8e65	Add PA calculations for LoRa1280F27	8 months ago
jacob.eva	fa16f4a54d	Implement SX127X clearIRQStatus function	8 months ago
jacob.eva	379dce99b3	Fix various SX1280 issues, revamp RX ISR flow	8 months ago
jacob.eva	11c9522d53	Fix SX1280 preamble calculation bug	8 months ago
jacob.eva	3f8d012457	Add multiple interface support	9 months ago