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Datalogger reading kWh pulses from a utility grid meter and publising it via MQTT
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atmega328p_mqtt_energy_meter/hardware/MQTT_energy_meter.kicad_pcb...

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(module Capacitor_THT:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 63B2E029) (tstamp 63B33E9D)
Final release
2 years ago
(at 237.2 67.4 270)
Added hardware design files.
2 years ago
(descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor")
(tags "CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor")
(path /637E7E46)
Final release
2 years ago
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2 years ago
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Final release
2 years ago
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Added hardware design files.
2 years ago
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(fp_line (start 3.411 -1.443) (end 3.411 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 3.411 1.04) (end 3.411 1.443) (layer F.SilkS) (width 0.12))
(fp_line (start 3.451 -1.383) (end 3.451 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 3.451 1.04) (end 3.451 1.383) (layer F.SilkS) (width 0.12))
(fp_line (start 3.491 -1.319) (end 3.491 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 3.491 1.04) (end 3.491 1.319) (layer F.SilkS) (width 0.12))
(fp_line (start 3.531 -1.251) (end 3.531 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 3.531 1.04) (end 3.531 1.251) (layer F.SilkS) (width 0.12))
(fp_line (start 3.571 -1.178) (end 3.571 1.178) (layer F.SilkS) (width 0.12))
(fp_line (start 3.611 -1.098) (end 3.611 1.098) (layer F.SilkS) (width 0.12))
(fp_line (start 3.651 -1.011) (end 3.651 1.011) (layer F.SilkS) (width 0.12))
(fp_line (start 3.691 -0.915) (end 3.691 0.915) (layer F.SilkS) (width 0.12))
(fp_line (start 3.731 -0.805) (end 3.731 0.805) (layer F.SilkS) (width 0.12))
(fp_line (start 3.771 -0.677) (end 3.771 0.677) (layer F.SilkS) (width 0.12))
(fp_line (start 3.811 -0.518) (end 3.811 0.518) (layer F.SilkS) (width 0.12))
(fp_line (start 3.851 -0.284) (end 3.851 0.284) (layer F.SilkS) (width 0.12))
(fp_line (start -1.554775 -1.475) (end -1.054775 -1.475) (layer F.SilkS) (width 0.12))
(fp_line (start -1.304775 -1.725) (end -1.304775 -1.225) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_text user %R (at 1.25 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole circle (at 2.5 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 63B2E009) (tstamp 63B331D3)
(at 241.5 90.4 270)
Added hardware design files.
2 years ago
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor")
Final release
2 years ago
(path /637DF69F)
(fp_text reference C2 (at 4.4 2.3 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 100n (at 2.5 2.5 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start 0 1.25) (end 5 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.25) (end 5 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start -0.12 -1.37) (end 5.12 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.37) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end -0.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.055) (end -0.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 -1.37) (end 5.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 1.055) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 6.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 1.5) (end 6.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.5 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 1 VCC))
(pad 2 thru_hole circle (at 5 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D5.0mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 63B2DFF7) (tstamp 63B331E8)
(at 254.8 82.3 270)
Added hardware design files.
2 years ago
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor")
Final release
2 years ago
(path /6398D053)
(fp_text reference C3 (at -2.4 0 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 100n (at 2.5 2.5 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 1.25) (end 5 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.25) (end 5 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 -1.25) (end 0 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.12 -1.37) (end 5.12 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.37) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end -0.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.055) (end -0.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 -1.37) (end 5.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 1.055) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 6.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 1.5) (end 6.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_text user %R (at 2.5 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 3 "Net-(C3-Pad1)"))
(pad 2 thru_hole circle (at 5 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D5.0mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Capacitor_THT:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 63B2E030) (tstamp 63B3326C)
(at 237.2 76.1 90)
(descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor")
(tags "CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor")
(path /639134F2)
(fp_text reference C4 (at -2.8 0.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 10U (at 1.25 3.75 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
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(fp_line (start 1.73 -2.536) (end 1.73 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.69 1.04) (end 1.69 2.543) (layer F.SilkS) (width 0.12))
(fp_line (start 1.69 -2.543) (end 1.69 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.65 1.04) (end 1.65 2.55) (layer F.SilkS) (width 0.12))
(fp_line (start 1.65 -2.55) (end 1.65 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.61 1.04) (end 1.61 2.556) (layer F.SilkS) (width 0.12))
(fp_line (start 1.61 -2.556) (end 1.61 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.57 1.04) (end 1.57 2.561) (layer F.SilkS) (width 0.12))
(fp_line (start 1.57 -2.561) (end 1.57 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.53 1.04) (end 1.53 2.565) (layer F.SilkS) (width 0.12))
(fp_line (start 1.53 -2.565) (end 1.53 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.49 1.04) (end 1.49 2.569) (layer F.SilkS) (width 0.12))
(fp_line (start 1.49 -2.569) (end 1.49 -1.04) (layer F.SilkS) (width 0.12))
(fp_line (start 1.45 -2.573) (end 1.45 2.573) (layer F.SilkS) (width 0.12))
(fp_line (start 1.41 -2.576) (end 1.41 2.576) (layer F.SilkS) (width 0.12))
(fp_line (start 1.37 -2.578) (end 1.37 2.578) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 -2.579) (end 1.33 2.579) (layer F.SilkS) (width 0.12))
(fp_line (start 1.29 -2.58) (end 1.29 2.58) (layer F.SilkS) (width 0.12))
(fp_line (start 1.25 -2.58) (end 1.25 2.58) (layer F.SilkS) (width 0.12))
(fp_line (start -0.633605 -1.3375) (end -0.633605 -0.8375) (layer F.Fab) (width 0.1))
(fp_line (start -0.883605 -1.0875) (end -0.383605 -1.0875) (layer F.Fab) (width 0.1))
(fp_circle (center 1.25 0) (end 4 0) (layer F.CrtYd) (width 0.05))
(fp_circle (center 1.25 0) (end 3.87 0) (layer F.SilkS) (width 0.12))
(fp_circle (center 1.25 0) (end 3.75 0) (layer F.Fab) (width 0.1))
(fp_text user %R (at 1.25 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 thru_hole circle (at 2.5 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole rect (at 0 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 4 "Net-(C4-Pad1)"))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/CP_Radial_D5.0mm_P2.50mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 63B2E01B) (tstamp 63B361A4)
(at 232.9 78.4 90)
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor")
(path /6391A1B5)
(fp_text reference C5 (at -0.8 -2.3 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 100n (at 2.5 2.5 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 1.25) (end 5 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.25) (end 5 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 -1.25) (end 0 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.12 -1.37) (end 5.12 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.37) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end -0.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.055) (end -0.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 -1.37) (end 5.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 1.055) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 6.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 1.5) (end 6.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_text user %R (at 2.5 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 4 "Net-(C4-Pad1)"))
(pad 2 thru_hole circle (at 5 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D5.0mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 63B2E000) (tstamp 63B33296)
(at 241.5 64.8 270)
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor")
(path /6382F4A6)
(fp_text reference C6 (at -2.7 -0.1 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 2.5 2.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.05 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 1.5) (end 6.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 6.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.12 1.055) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 -1.37) (end 5.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.055) (end -0.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end -0.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.37) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end 5.12 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5 -1.25) (end 0 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.25) (end 5 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 1.25) (end 5 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Fab) (width 0.1))
(fp_text user %R (at 2.5 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 thru_hole circle (at 5 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 1 VCC))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D5.0mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 63B2E012) (tstamp 63B361E0)
(at 232.9 65.8 270)
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor")
(path /6391C15A)
(fp_text reference C7 (at -2.5 0 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 2.5 2.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.05 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.05 1.5) (end 6.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 6.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.12 1.055) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5.12 -1.37) (end 5.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.055) (end -0.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end -0.12 -1.055) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 1.37) (end 5.12 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start -0.12 -1.37) (end 5.12 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 5 -1.25) (end 0 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.25) (end 5 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 1.25) (end 5 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Fab) (width 0.1))
(fp_text user %R (at 2.5 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 thru_hole circle (at 5 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D5.0mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 63B2DFDE) (tstamp 63B332C1)
Final release
2 years ago
(at 258.5 86 180)
Added hardware design files.
2 years ago
(descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x02 2.54mm single row")
(path /637CAE56)
Final release
2 years ago
(fp_text reference D1 (at 0.1 5.7 270) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value BPW34 (at 0 4.87) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 1.27 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 2 thru_hole oval (at 0 2.54 180) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 3 "Net-(C3-Pad1)"))
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 180) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_THT:LED_D3.0mm_IRGrey (layer F.Cu) (tedit 63B2E04B) (tstamp 63B332D5)
Final release
2 years ago
(at 229.2 94.1 270)
Added hardware design files.
2 years ago
(descr "IR-LED, diameter 3.0mm, 2 pins, color: grey")
(tags "IR infrared LED diameter 3.0mm 2 pins grey")
(path /63852E70)
Final release
2 years ago
(fp_text reference D2 (at 2.9 3.3 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value STATUS (at 1.27 2.96 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.23 -1.16619) (end -0.23 1.16619) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start -0.29 -1.236) (end -0.29 -1.08) (layer F.SilkS) (width 0.12))
(fp_line (start -0.29 1.08) (end -0.29 1.236) (layer F.SilkS) (width 0.12))
(fp_line (start -1.15 -2.25) (end -1.15 2.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.15 2.25) (end 3.7 2.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 2.25) (end 3.7 -2.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -2.25) (end -1.15 -2.25) (layer F.CrtYd) (width 0.05))
(fp_circle (center 1.27 0) (end 2.77 0) (layer F.Fab) (width 0.1))
(fp_text user %R (at 1.47 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 0.8 0.8) (thickness 0.12)))
)
(fp_arc (start 1.27 0) (end -0.23 -1.16619) (angle 284.3) (layer F.Fab) (width 0.1))
(fp_arc (start 1.27 0) (end -0.29 -1.235516) (angle 108.8) (layer F.SilkS) (width 0.12))
(fp_arc (start 1.27 0) (end -0.29 1.235516) (angle -108.8) (layer F.SilkS) (width 0.12))
(fp_arc (start 1.27 0) (end 0.229039 -1.08) (angle 87.9) (layer F.SilkS) (width 0.12))
(fp_arc (start 1.27 0) (end 0.229039 1.08) (angle -87.9) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 270) (size 2 2) (drill 0.9) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 2 thru_hole circle (at 2.54 0 270) (size 2 2) (drill 0.9) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 5 "Net-(D2-Pad2)"))
(model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D3.0mm_IRGrey.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module TerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal (layer F.Cu) (tedit 5B294EE5) (tstamp 63B33301)
Final release
2 years ago
(at 228.8 83.1 270)
Added hardware design files.
2 years ago
(descr "Terminal Block Phoenix MKDS-1,5-2, 2 pins, pitch 5mm, size 10x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix")
(tags "THT Terminal Block Phoenix MKDS-1,5-2 pitch 5mm size 10x9.8mm^2 drill 1.3mm pad 2.6mm")
(path /6392A12E)
Final release
2 years ago
(fp_text reference J1 (at -1.7 5.8 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value "8-24V in" (at 2.5 5.66 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 1.5 0) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_circle (center 5 0) (end 6.5 0) (layer F.Fab) (width 0.1))
(fp_circle (center 5 0) (end 6.68 0) (layer F.SilkS) (width 0.12))
(fp_line (start -2.5 -5.2) (end 7.5 -5.2) (layer F.Fab) (width 0.1))
(fp_line (start 7.5 -5.2) (end 7.5 4.6) (layer F.Fab) (width 0.1))
(fp_line (start 7.5 4.6) (end -2 4.6) (layer F.Fab) (width 0.1))
(fp_line (start -2 4.6) (end -2.5 4.1) (layer F.Fab) (width 0.1))
(fp_line (start -2.5 4.1) (end -2.5 -5.2) (layer F.Fab) (width 0.1))
(fp_line (start -2.5 4.1) (end 7.5 4.1) (layer F.Fab) (width 0.1))
(fp_line (start -2.56 4.1) (end 7.56 4.1) (layer F.SilkS) (width 0.12))
(fp_line (start -2.5 2.6) (end 7.5 2.6) (layer F.Fab) (width 0.1))
(fp_line (start -2.56 2.6) (end 7.56 2.6) (layer F.SilkS) (width 0.12))
(fp_line (start -2.5 -2.3) (end 7.5 -2.3) (layer F.Fab) (width 0.1))
(fp_line (start -2.56 -2.301) (end 7.56 -2.301) (layer F.SilkS) (width 0.12))
(fp_line (start -2.56 -5.261) (end 7.56 -5.261) (layer F.SilkS) (width 0.12))
(fp_line (start -2.56 4.66) (end 7.56 4.66) (layer F.SilkS) (width 0.12))
(fp_line (start -2.56 -5.261) (end -2.56 4.66) (layer F.SilkS) (width 0.12))
(fp_line (start 7.56 -5.261) (end 7.56 4.66) (layer F.SilkS) (width 0.12))
(fp_line (start 1.138 -0.955) (end -0.955 1.138) (layer F.Fab) (width 0.1))
(fp_line (start 0.955 -1.138) (end -1.138 0.955) (layer F.Fab) (width 0.1))
(fp_line (start 6.138 -0.955) (end 4.046 1.138) (layer F.Fab) (width 0.1))
(fp_line (start 5.955 -1.138) (end 3.863 0.955) (layer F.Fab) (width 0.1))
(fp_line (start 6.275 -1.069) (end 6.228 -1.023) (layer F.SilkS) (width 0.12))
(fp_line (start 3.966 1.239) (end 3.931 1.274) (layer F.SilkS) (width 0.12))
(fp_line (start 6.07 -1.275) (end 6.035 -1.239) (layer F.SilkS) (width 0.12))
(fp_line (start 3.773 1.023) (end 3.726 1.069) (layer F.SilkS) (width 0.12))
(fp_line (start -2.8 4.16) (end -2.8 4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -2.8 4.9) (end -2.3 4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -3 -5.71) (end -3 5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 5.1) (end 8 5.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 8 5.1) (end 8 -5.71) (layer F.CrtYd) (width 0.05))
(fp_line (start 8 -5.71) (end -3 -5.71) (layer F.CrtYd) (width 0.05))
Added hardware design files.
2 years ago
(fp_arc (start 0 0) (end 0 1.68) (angle -24) (layer F.SilkS) (width 0.12))
(fp_arc (start 0 0) (end 1.535 0.684) (angle -48) (layer F.SilkS) (width 0.12))
(fp_arc (start 0 0) (end 0.684 -1.535) (angle -48) (layer F.SilkS) (width 0.12))
(fp_arc (start 0 0) (end -1.535 -0.684) (angle -48) (layer F.SilkS) (width 0.12))
(fp_arc (start 0 0) (end -0.684 1.535) (angle -25) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_text user %R (at 2.5 3.2 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 270) (size 2.6 2.6) (drill 1.3) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 2 thru_hole circle (at 5 0 270) (size 2.6 2.6) (drill 1.3) (layers *.Cu *.Mask)
(net 4 "Net-(C4-Pad1)"))
Added hardware design files.
2 years ago
(model ${KISYS3DMOD}/TerminalBlock_Phoenix.3dshapes/TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 63B2E040) (tstamp 63B33317)
Final release
2 years ago
(at 236.9 94.9 270)
Added hardware design files.
2 years ago
(descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x02 2.54mm single row")
(path /6383FB12)
Final release
2 years ago
(fp_text reference JP1 (at 2.7 2.5 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value SET (at 0 4.87 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
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(fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 1.27) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 270) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 6 "Net-(JP1-Pad1)"))
Final release
2 years ago
(pad 2 thru_hole oval (at 0 2.54 270) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical (layer F.Cu) (tedit 63B2DFE7) (tstamp 63B3332E)
Final release
2 years ago
(at 264 92.5)
Added hardware design files.
2 years ago
(descr "Through hole straight pin header, 1x03, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x03 2.54mm single row")
(path /63B25D42)
Final release
2 years ago
(fp_text reference JP2 (at -1.2 8.4 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value "Invert pulse" (at 0 7.41) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start 1.27 -1.27) (end 1.27 6.35) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 6.35) (end -1.27 6.35) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 6.35) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
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(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 6.85) (end 1.8 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 6.85) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 2.54 -270) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 "Net-(JP2-Pad1)"))
(pad 2 thru_hole oval (at 0 2.54) (size 2 2) (drill 1) (layers *.Cu *.Mask)
(net 8 "Net-(JP2-Pad2)"))
(pad 3 thru_hole oval (at 0 5.08) (size 2 2) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(JP2-Pad3)"))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl
Added hardware design files.
2 years ago
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 61E2EAE3) (tstamp 63B33345)
(at 251.5 77.2 270)
Added hardware design files.
2 years ago
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
Final release
2 years ago
(path /637CBD86)
(fp_text reference R1 (at -1.8 -1.7 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 10k (at 5.08 2.37 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
(fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 8.35 1.37) (end 8.35 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 8.35 -1.37) (end 1.81 -1.37) (layer F.SilkS) (width 0.12))
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(fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_text user %R (at 5.08 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 2 thru_hole circle (at 10.16 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 3 "Net-(C3-Pad1)"))
Added hardware design files.
2 years ago
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 61E2EAE3) (tstamp 63B3335C)
(at 248.2 77.2 270)
Added hardware design files.
2 years ago
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
Final release
2 years ago
(path /637CC5CF)
(fp_text reference R2 (at -1.8 -1.7 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 10k (at 5.08 2.37 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12))
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(fp_line (start 8.35 1.37) (end 8.35 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
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(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_text user %R (at 5.08 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 10 "Net-(R2-Pad1)"))
Final release
2 years ago
(pad 2 thru_hole circle (at 10.16 0 270) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 2 GND))
Added hardware design files.
2 years ago
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Final release
2 years ago
(module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 61E2EAE3) (tstamp 63B33373)
(at 244.9 87.4 90)
Added hardware design files.
2 years ago
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
Final release
2 years ago
(path /637CEB9B)
(fp_text reference R3 (at 12 1.8 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 33k (at 5.08 2.37 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
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(fp_line (start 8.35 -1.37) (end 1.81 -1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 1.04 0) (end 1.81 0) (layer F.SilkS) (width 0.12))
(fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 5.08 0 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 2 thru_hole circle (at 10.16 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
(net 10 "Net-(R2-Pad1)"))
Added hardware design files.
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Final release
2 years ago
(net 11 "Net-(R3-Pad1)"))
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 61E2EAE3) (tstamp 63B3338A)
(at 239.6 100.7 180)
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
(path /6385274C)
(fp_text reference R4 (at -0.3 2.5 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 5.08 2.37) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12))
(fp_line (start 1.04 0) (end 1.81 0) (layer F.SilkS) (width 0.12))
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(fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12))
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
(fp_text user %R (at 5.08 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole circle (at 0 0 180) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 5 "Net-(D2-Pad2)"))
Final release
2 years ago
(pad 2 thru_hole circle (at 10.16 0 180) (size 2 2) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 12 "Net-(R4-Pad2)"))
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Potentiometer_THT:Potentiometer_ACP_CA9-H5_Horizontal (layer F.Cu) (tedit 5A3D4994) (tstamp 63B333AA)
Final release
2 years ago
(at 257.6 66.7)
Added hardware design files.
2 years ago
(descr "Potentiometer, horizontal, ACP CA9-H5, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf")
(tags "Potentiometer horizontal ACP CA9-H5")
(path /637CCCD9)
Final release
2 years ago
(fp_text reference RV1 (at 0.8 -4.3 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 500k (at 0 8.65) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_line (start 4.8 -2.4) (end 4.8 7.4) (layer F.Fab) (width 0.1))
(fp_line (start 4.8 7.4) (end 0 7.4) (layer F.Fab) (width 0.1))
(fp_line (start 0 7.4) (end 0 -2.4) (layer F.Fab) (width 0.1))
(fp_line (start 0 -2.4) (end 4.8 -2.4) (layer F.Fab) (width 0.1))
(fp_line (start 0 1) (end 0 4) (layer F.Fab) (width 0.1))
(fp_line (start 0 4) (end 4.8 4) (layer F.Fab) (width 0.1))
(fp_line (start 4.8 4) (end 4.8 1) (layer F.Fab) (width 0.1))
(fp_line (start 4.8 1) (end 0 1) (layer F.Fab) (width 0.1))
(fp_line (start -0.121 -2.521) (end 4.92 -2.521) (layer F.SilkS) (width 0.12))
(fp_line (start -0.121 7.52) (end 4.92 7.52) (layer F.SilkS) (width 0.12))
(fp_line (start 4.92 -2.521) (end 4.92 1.075) (layer F.SilkS) (width 0.12))
(fp_line (start 4.92 3.925) (end 4.92 7.52) (layer F.SilkS) (width 0.12))
(fp_line (start -0.121 6.425) (end -0.121 7.52) (layer F.SilkS) (width 0.12))
(fp_line (start -0.121 -2.521) (end -0.121 -1.426) (layer F.SilkS) (width 0.12))
Added hardware design files.
2 years ago
(fp_line (start -0.121 1.426) (end -0.121 3.575) (layer F.SilkS) (width 0.12))
(fp_line (start 1.237 0.88) (end 4.92 0.88) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_line (start 1.237 4.12) (end 4.92 4.12) (layer F.SilkS) (width 0.12))
Added hardware design files.
2 years ago
(fp_line (start -0.121 1.426) (end -0.121 3.575) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_line (start 4.92 0.88) (end 4.92 1.075) (layer F.SilkS) (width 0.12))
(fp_line (start 4.92 3.925) (end 4.92 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start -1.45 -2.7) (end -1.45 7.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 7.65) (end 6.45 7.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.45 7.65) (end 6.45 -2.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.45 -2.7) (end -1.45 -2.7) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.4 2.5) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 3 thru_hole circle (at 0 5) (size 2.34 2.34) (drill 1.3) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 10 "Net-(R2-Pad1)"))
Final release
2 years ago
(pad 2 thru_hole circle (at 5 2.5) (size 2.34 2.34) (drill 1.3) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0) (size 2.34 2.34) (drill 1.3) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Potentiometer_THT.3dshapes/Potentiometer_ACP_CA9-H5_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module mtk_processor:Arduino_Mini_Plus (layer F.Cu) (tedit 637BA142) (tstamp 63B3340F)
Final release
2 years ago
(at 229.7 119.8 90)
Added hardware design files.
2 years ago
(descr "Arduino Nano, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf")
(tags "Arduino Nano")
(path /637B78BA)
Final release
2 years ago
(fp_text reference U3 (at 0 -2.4 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value "Arduino Mini Plus" (at 8.89 15.24) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.5 -1.25) (end 16.75 -1.25) (layer F.SilkS) (width 0.15))
Final release
2 years ago
(fp_line (start 16.75 -1.25) (end 16.75 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start 16.75 31.75) (end -1.25 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start -1.5 -1.25) (end -1.5 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start -1.5 31.75) (end -1.25 31.75) (layer F.SilkS) (width 0.15))
(fp_line (start -1.5 1.25) (end 1.75 1.25) (layer F.SilkS) (width 0.15))
(fp_line (start 1.75 1.25) (end 1.75 -1.25) (layer F.SilkS) (width 0.15))
(fp_line (start -1.5 -1.25) (end 16.75 -1.25) (layer Dwgs.User) (width 0.12))
(fp_line (start 16.75 -1.25) (end 16.75 31.75) (layer Dwgs.User) (width 0.12))
(fp_line (start 16.75 31.75) (end -1.5 31.75) (layer Dwgs.User) (width 0.12))
(fp_line (start -1.5 31.75) (end -1.5 -1.25) (layer Dwgs.User) (width 0.12))
(fp_text user %R (at 6.35 16.51) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 24 thru_hole oval (at 15.24 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 12 "Net-(R4-Pad2)"))
Final release
2 years ago
(pad 23 thru_hole oval (at 15.24 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 23 "Net-(U3-Pad23)"))
Final release
2 years ago
(pad 22 thru_hole oval (at 15.24 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 24 "Net-(U3-Pad22)"))
Final release
2 years ago
(pad 12 thru_hole oval (at 0 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 25 "Net-(U3-Pad12)"))
Final release
2 years ago
(pad 21 thru_hole oval (at 15.24 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 26 "Net-(U3-Pad21)"))
Final release
2 years ago
(pad 11 thru_hole oval (at 0 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 20 thru_hole oval (at 15.24 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 27 "Net-(U3-Pad20)"))
Final release
2 years ago
(pad 10 thru_hole oval (at 0 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 18 "Net-(U1-Pad4)"))
Final release
2 years ago
(pad 19 thru_hole oval (at 15.24 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 6 "Net-(JP1-Pad1)"))
Final release
2 years ago
(pad 9 thru_hole oval (at 0 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
Final release
2 years ago
(pad 18 thru_hole oval (at 15.24 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 28 "Net-(U3-Pad18)"))
Final release
2 years ago
(pad 8 thru_hole oval (at 0 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 29 "Net-(U3-Pad8)"))
Final release
2 years ago
(pad 17 thru_hole oval (at 15.24 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 8 "Net-(JP2-Pad2)"))
Final release
2 years ago
(pad 7 thru_hole oval (at 0 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 30 "Net-(U3-Pad7)"))
Final release
2 years ago
(pad 16 thru_hole oval (at 15.24 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 6 thru_hole oval (at 0 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 31 "Net-(U3-Pad6)"))
Final release
2 years ago
(pad 15 thru_hole oval (at 15.24 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 32 "Net-(U3-Pad15)"))
Final release
2 years ago
(pad 5 thru_hole oval (at 0 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 33 "Net-(U3-Pad5)"))
Final release
2 years ago
(pad 14 thru_hole oval (at 15.24 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 34 "Net-(U3-Pad14)"))
Final release
2 years ago
(pad 4 thru_hole oval (at 0 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 19 "Net-(U1-Pad6)"))
Final release
2 years ago
(pad 13 thru_hole oval (at 15.24 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 35 "Net-(U3-Pad13)"))
Final release
2 years ago
(pad 3 thru_hole oval (at 0 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 20 "Net-(U1-Pad8)"))
Final release
2 years ago
(pad 2 thru_hole oval (at 0 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 13 "Net-(U1-Pad5)"))
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 16 "Net-(U1-Pad3)"))
(model ${KISYS3DMOD}/Module.3dshapes/Arduino_Nano_WithMountingHoles.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_DIP:DIP-8_W7.62mm_LongPads (layer F.Cu) (tedit 5A02E8C5) (tstamp 63B3342B)
Final release
2 years ago
(at 244.9 72.9 90)
Added hardware design files.
2 years ago
(descr "8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads")
(tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads")
(path /637C1842)
Final release
2 years ago
(fp_text reference U2 (at -0.5 -2.8 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value TL072 (at 3.81 9.95 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start 6.985 -1.27) (end 6.985 8.89) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 8.89) (end 0.635 8.89) (layer F.Fab) (width 0.1))
(fp_line (start 0.635 8.89) (end 0.635 -0.27) (layer F.Fab) (width 0.1))
(fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 2.81 -1.33) (end 1.56 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.56 -1.33) (end 1.56 8.95) (layer F.SilkS) (width 0.12))
(fp_line (start 1.56 8.95) (end 6.06 8.95) (layer F.SilkS) (width 0.12))
(fp_line (start 6.06 8.95) (end 6.06 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 6.06 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.45 -1.55) (end -1.45 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 9.15) (end 9.1 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.1 9.15) (end 9.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.1 -1.55) (end -1.45 -1.55) (layer F.CrtYd) (width 0.05))
Added hardware design files.
2 years ago
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_text user %R (at 3.81 3.81 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 11 "Net-(R3-Pad1)"))
Final release
2 years ago
(pad 5 thru_hole oval (at 7.62 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 2 thru_hole oval (at 0 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 3 "Net-(C3-Pad1)"))
Final release
2 years ago
(pad 6 thru_hole oval (at 7.62 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 22 "Net-(U2-Pad6)"))
Final release
2 years ago
(pad 3 thru_hole oval (at 0 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 10 "Net-(R2-Pad1)"))
Final release
2 years ago
(pad 7 thru_hole oval (at 7.62 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 22 "Net-(U2-Pad6)"))
Final release
2 years ago
(pad 4 thru_hole oval (at 0 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 8 thru_hole oval (at 7.62 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-8_W7.62mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_DIP:DIP-14_W7.62mm_LongPads (layer F.Cu) (tedit 5A02E8C5) (tstamp 63B3344D)
Final release
2 years ago
(at 244.9 98.5 90)
Added hardware design files.
2 years ago
(descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads")
(tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads")
(path /637FF23E)
Final release
2 years ago
(fp_text reference U5 (at -0.7 -2.5 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value 74HC14 (at 3.81 17.57 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
Final release
2 years ago
(fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1))
(fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1))
(fp_line (start 0.635 16.51) (end 0.635 -0.27) (layer F.Fab) (width 0.1))
(fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 2.81 -1.33) (end 1.56 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.56 -1.33) (end 1.56 16.57) (layer F.SilkS) (width 0.12))
(fp_line (start 1.56 16.57) (end 6.06 16.57) (layer F.SilkS) (width 0.12))
(fp_line (start 6.06 16.57) (end 6.06 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 6.06 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.45 -1.55) (end -1.45 16.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 16.8) (end 9.1 16.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.1 16.8) (end 9.1 -1.55) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.1 -1.55) (end -1.45 -1.55) (layer F.CrtYd) (width 0.05))
Added hardware design files.
2 years ago
(fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_text user %R (at 3.81 7.62 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 8 thru_hole oval (at 7.62 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 36 "Net-(U5-Pad8)"))
Final release
2 years ago
(pad 2 thru_hole oval (at 0 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 38 "Net-(U5-Pad2)"))
Final release
2 years ago
(pad 9 thru_hole oval (at 7.62 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 3 thru_hole oval (at 0 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 10 thru_hole oval (at 7.62 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 7 "Net-(JP2-Pad1)"))
Final release
2 years ago
(pad 4 thru_hole oval (at 0 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 39 "Net-(U5-Pad4)"))
Final release
2 years ago
(pad 11 thru_hole oval (at 7.62 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 9 "Net-(JP2-Pad3)"))
Final release
2 years ago
(pad 5 thru_hole oval (at 0 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 12 thru_hole oval (at 7.62 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 9 "Net-(JP2-Pad3)"))
Final release
2 years ago
(pad 6 thru_hole oval (at 0 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 37 "Net-(U5-Pad6)"))
Final release
2 years ago
(pad 13 thru_hole oval (at 7.62 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 11 "Net-(R3-Pad1)"))
Final release
2 years ago
(pad 7 thru_hole oval (at 0 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 14 thru_hole oval (at 7.62 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-14_W7.62mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Converter_DCDC:Converter_DCDC_TRACO_TSR-1_THT (layer F.Cu) (tedit 59FE1FB7) (tstamp 63B33464)
Final release
2 years ago
(at 228.7 74.3 90)
Added hardware design files.
2 years ago
(descr "DCDC-Converter, TRACO, TSR 1-xxxx")
(tags "DCDC-Converter TRACO TSR-1")
(path /639103C8)
Final release
2 years ago
(fp_text reference U6 (at 9.9 -5.1 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value TSR_1-2450 (at 2.5 3.25 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.75 2.45) (end -1.42 2.45) (layer F.SilkS) (width 0.12))
Final release
2 years ago
(fp_line (start -3.75 0) (end -3.75 2.45) (layer F.SilkS) (width 0.12))
(fp_line (start -3.3 1) (end -2.3 2) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 1) (end -3.3 -5.6) (layer F.Fab) (width 0.1))
(fp_line (start 8.4 2) (end 8.4 -5.6) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 -5.6) (end 8.4 -5.6) (layer F.Fab) (width 0.1))
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(fp_text user %R (at 3 -3 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole rect (at 0 0 90) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 4 "Net-(C4-Pad1)"))
Final release
2 years ago
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 3 thru_hole oval (at 5.08 0 90) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Converter_DCDC.3dshapes/Converter_DCDC_TRACO_TSR-1_THT.wrl
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(module MountingHole:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 63B3582A)
Final release
2 years ago
(at 224.8 59.7 90)
Added hardware design files.
2 years ago
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(path /63B932DF)
(attr virtual)
Final release
2 years ago
(fp_text reference H1 (at 0 0.1 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value MountingHole (at 0 3.8 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
Final release
2 years ago
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0.3 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
Added hardware design files.
2 years ago
)
(module MountingHole:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 63B36A9A)
Final release
2 years ago
(at 263.8 59.7 90)
Added hardware design files.
2 years ago
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(path /63B92FD1)
(attr virtual)
Final release
2 years ago
(fp_text reference H2 (at -0.1 0.1 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value MountingHole (at 0 3.8 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_text user %R (at 0.3 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
Added hardware design files.
2 years ago
)
(module MountingHole:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 63B3583A)
Final release
2 years ago
(at 224.8 130.7 90)
Added hardware design files.
2 years ago
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(path /63B92CBB)
(attr virtual)
Final release
2 years ago
(fp_text reference H3 (at 0 0 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value MountingHole (at 0 3.8 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
Final release
2 years ago
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0.3 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
Added hardware design files.
2 years ago
)
(module MountingHole:MountingHole_3.2mm_M3_DIN965_Pad (layer F.Cu) (tedit 56D1B4CB) (tstamp 63B35842)
Final release
2 years ago
(at 263.8 130.7 90)
Added hardware design files.
2 years ago
(descr "Mounting Hole 3.2mm, M3, DIN965")
(tags "mounting hole 3.2mm m3 din965")
(path /63B91EC4)
(attr virtual)
Final release
2 years ago
(fp_text reference H4 (at -0.1 0 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(fp_text value MountingHole (at 0 3.8 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 3.05 0) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_circle (center 0 0) (end 2.8 0) (layer Cmts.User) (width 0.15))
(fp_text user %R (at 0.3 0 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
Final release
2 years ago
(pad 1 thru_hole circle (at 0 0 90) (size 5.6 5.6) (drill 3.2) (layers *.Cu *.Mask))
Added hardware design files.
2 years ago
)
(module Connector_PinHeader_2.54mm:PinHeader_2x06_P2.54mm_Vertical (layer F.Cu) (tedit 63B2E7B9) (tstamp 63B367EA)
Final release
2 years ago
(at 235.4 129.2 90)
Added hardware design files.
2 years ago
(descr "Through hole straight pin header, 2x06, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x06 2.54mm double row")
(path /637B9F6F)
Final release
2 years ago
(fp_text reference U1 (at -0.8 -2.7 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(fp_text value ENC28J60 (at 1.27 15.03 90) (layer F.Fab)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
Final release
2 years ago
(fp_line (start 4.35 14.5) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
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Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(pad 1 thru_hole roundrect (at 0 0 90) (size 2 2) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.25)
Added hardware design files.
2 years ago
(net 40 "Net-(U1-Pad1)"))
Final release
2 years ago
(pad 2 thru_hole oval (at 2.54 0 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 17 "Net-(U1-Pad2)"))
Final release
2 years ago
(pad 3 thru_hole oval (at 0 2.54 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 16 "Net-(U1-Pad3)"))
Final release
2 years ago
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 18 "Net-(U1-Pad4)"))
Final release
2 years ago
(pad 5 thru_hole oval (at 0 5.08 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 13 "Net-(U1-Pad5)"))
Final release
2 years ago
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 19 "Net-(U1-Pad6)"))
Final release
2 years ago
(pad 7 thru_hole oval (at 0 7.62 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 14 "Net-(U1-Pad7)"))
Final release
2 years ago
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 20 "Net-(U1-Pad8)"))
Final release
2 years ago
(pad 9 thru_hole oval (at 0 10.16 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 15 "Net-(U1-Pad9)"))
Final release
2 years ago
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 21 "Net-(U1-Pad10)"))
Final release
2 years ago
(pad 11 thru_hole oval (at 0 12.7 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 2 GND))
Final release
2 years ago
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 2 2) (drill 1) (layers *.Cu *.Mask)
Added hardware design files.
2 years ago
(net 1 VCC))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x06_P2.54mm_Vertical.wrl
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Final release
2 years ago
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Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text 8-24VDC (at 221.9 83.4 270) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text Sensitivity (at 265.3 69.2 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text "Pulse input" (at 261.1 84.6 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text "Invert pulse" (at 266.7 95 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text ENC28J60 (at 241.8 132.1) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text "© 2023 M.T. Konstapel" (at 265.7 116.3 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text "Energy meter pulse counter" (at 263.6 115.1 90) (layer F.SilkS)
Added hardware design files.
2 years ago
(effects (font (size 1 1) (thickness 0.15)))
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Final release
2 years ago
(gr_text "Energy meter pulse counter" (at 244.2 60.3 180) (layer B.Cu) (tstamp 63B33B40)
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Added hardware design files.
2 years ago
)
Final release
2 years ago
(gr_text "© 2023 M.T. Konstapel" (at 242.6 57.6 180) (layer B.Cu)
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Added hardware design files.
2 years ago
)
Final release
2 years ago
(gr_line (start 220.8 55.7) (end 267.8 55.7) (layer Margin) (width 0.15) (tstamp 63B36ACB))
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Added hardware design files.
2 years ago
Final release
2 years ago
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Added hardware design files.
2 years ago
)