Cleanup
This commit is contained in:
		
							
								
								
									
										833
									
								
								sx126x.cpp
									
									
									
									
									
								
							
							
						
						
									
										833
									
								
								sx126x.cpp
									
									
									
									
									
								
							
										
											
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										5
									
								
								sx126x.h
									
									
									
									
									
								
							
							
						
						
									
										5
									
								
								sx126x.h
									
									
									
									
									
								
							@@ -1,9 +1,6 @@
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		||||
// Copyright (c) Sandeep Mistry. All rights reserved.
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		||||
// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
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		||||
// Licensed under the MIT license.
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		||||
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		||||
// Modifications and additions copyright 2024 by Mark Qvist
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		||||
// Obviously still under the MIT license.
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#ifndef SX126X_H
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#define SX126X_H
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										80
									
								
								sx127x.cpp
									
									
									
									
									
								
							
							
						
						
									
										80
									
								
								sx127x.cpp
									
									
									
									
									
								
							@@ -1,9 +1,6 @@
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		||||
// Copyright (c) Sandeep Mistry. All rights reserved.
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		||||
// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
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		||||
// Licensed under the MIT license.
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		||||
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		||||
// Modifications and additions copyright 2024 by Mark Qvist
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		||||
// Obviously still under the MIT license.
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		||||
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#include "Boards.h"
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#if MODEM == SX1276
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@@ -81,10 +78,7 @@ extern SPIClass SPI;
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sx127x::sx127x() :
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  _spiSettings(8E6, MSBFIRST, SPI_MODE0),
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  _ss(LORA_DEFAULT_SS_PIN), _reset(LORA_DEFAULT_RESET_PIN), _dio0(LORA_DEFAULT_DIO0_PIN),
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  _frequency(0),
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  _packetIndex(0),
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  _preinit_done(false),
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  _onReceive(NULL) { setTimeout(0); }
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  _frequency(0), _packetIndex(0), _preinit_done(false), _onReceive(NULL) { setTimeout(0); }
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void sx127x::setSPIFrequency(uint32_t frequency) { _spiSettings = SPISettings(frequency, MSBFIRST, SPI_MODE0); }
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void sx127x::setPins(int ss, int reset, int dio0, int busy) { _ss = ss; _reset = reset; _dio0 = dio0; _busy = busy; }
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@@ -123,7 +117,6 @@ bool sx127x::preInit() {
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  }
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  if (version != 0x12) { return false; }
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  _preinit_done = true;
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  return true;
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}
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@@ -144,8 +137,6 @@ uint8_t ISR_VECT sx127x::singleTransfer(uint8_t address, uint8_t value) {
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int sx127x::begin(long frequency) {
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  if (_reset != -1) {
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    pinMode(_reset, OUTPUT);
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    // Perform reset
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    digitalWrite(_reset, LOW);
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    delay(10);
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    digitalWrite(_reset, HIGH);
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@@ -153,19 +144,16 @@ int sx127x::begin(long frequency) {
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  }
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  if (_busy != -1) { pinMode(_busy, INPUT); }
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  if (!_preinit_done) {
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    if (!preInit()) { return false; }
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  }
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  if (!_preinit_done) { if (!preInit()) { return false; } }
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  sleep();
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  setFrequency(frequency);
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  // set base addresses
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  // Set base addresses
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  writeRegister(REG_FIFO_TX_BASE_ADDR_7X, 0);
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  writeRegister(REG_FIFO_RX_BASE_ADDR_7X, 0);
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  // set LNA boost and auto AGC
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  // Set LNA boost and auto AGC
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  writeRegister(REG_LNA_7X, readRegister(REG_LNA_7X) | 0x03);
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  writeRegister(REG_MODEM_CONFIG_3_7X, 0x04);
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@@ -178,20 +166,13 @@ int sx127x::begin(long frequency) {
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  return 1;
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}
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void sx127x::end() {
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  sleep();
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  SPI.end();
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  _preinit_done = false;
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}
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void sx127x::end() { sleep(); SPI.end(); _preinit_done = false; }
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int sx127x::beginPacket(int implicitHeader) {
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  standby();
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  if (implicitHeader) {
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    implicitHeaderMode();
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  } else {
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    explicitHeaderMode();
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  }
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  if (implicitHeader) { implicitHeaderMode(); }
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  else { explicitHeaderMode(); }
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  // Reset FIFO address and payload length
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  writeRegister(REG_FIFO_ADDR_PTR_7X, 0);
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@@ -248,29 +229,24 @@ int ISR_VECT sx127x::packetRssi(uint8_t pkt_snr_raw) {
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}
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int ISR_VECT sx127x::packetRssi() {
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    int pkt_rssi = (int)readRegister(REG_PKT_RSSI_VALUE_7X) - RSSI_OFFSET;
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    int pkt_snr = packetSnr();
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  int pkt_rssi = (int)readRegister(REG_PKT_RSSI_VALUE_7X) - RSSI_OFFSET;
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  int pkt_snr = packetSnr();
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    if (_frequency < 820E6) pkt_rssi -= 7;
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  if (_frequency < 820E6) pkt_rssi -= 7;
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    if (pkt_snr < 0) {
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        pkt_rssi += pkt_snr;
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    } else {
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        // Slope correction is (16/15)*pkt_rssi,
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        // this estimation looses one floating point
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        // operation, and should be precise enough.
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        pkt_rssi = (int)(1.066 * pkt_rssi);
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    }
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    return pkt_rssi;
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  if (pkt_snr < 0) { pkt_rssi += pkt_snr; }
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  else {
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      // Slope correction is (16/15)*pkt_rssi,
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      // this estimation looses one floating point
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      // operation, and should be precise enough.
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      pkt_rssi = (int)(1.066 * pkt_rssi);
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  }
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  return pkt_rssi;
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}
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uint8_t ISR_VECT sx127x::packetSnrRaw() {
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    return readRegister(REG_PKT_SNR_VALUE_7X);
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}
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uint8_t ISR_VECT sx127x::packetSnrRaw() { return readRegister(REG_PKT_SNR_VALUE_7X); }
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float ISR_VECT sx127x::packetSnr() {
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    return ((int8_t)readRegister(REG_PKT_SNR_VALUE_7X)) * 0.25;
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}
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float ISR_VECT sx127x::packetSnr() { return ((int8_t)readRegister(REG_PKT_SNR_VALUE_7X)) * 0.25; }
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long sx127x::packetFrequencyError() {
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  int32_t freqError = 0;
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@@ -293,17 +269,13 @@ long sx127x::packetFrequencyError() {
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size_t sx127x::write(uint8_t byte) { return write(&byte, sizeof(byte)); }
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size_t sx127x::write(const uint8_t *buffer, size_t size) {
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    int currentLength = readRegister(REG_PAYLOAD_LENGTH_7X);
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    if ((currentLength + size) > MAX_PKT_LENGTH) {
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        size = MAX_PKT_LENGTH - currentLength;
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    }
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  int currentLength = readRegister(REG_PAYLOAD_LENGTH_7X);
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  if ((currentLength + size) > MAX_PKT_LENGTH) { size = MAX_PKT_LENGTH - currentLength; }
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    for (size_t i = 0; i < size; i++) {
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        writeRegister(REG_FIFO_7X, buffer[i]);
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    }
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  for (size_t i = 0; i < size; i++) { writeRegister(REG_FIFO_7X, buffer[i]); }
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  writeRegister(REG_PAYLOAD_LENGTH_7X, currentLength + size);
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    writeRegister(REG_PAYLOAD_LENGTH_7X, currentLength + size);
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    return size;
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  return size;
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}
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int ISR_VECT sx127x::available() { return (readRegister(REG_RX_NB_BYTES_7X) - _packetIndex); }
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										5
									
								
								sx127x.h
									
									
									
									
									
								
							
							
						
						
									
										5
									
								
								sx127x.h
									
									
									
									
									
								
							@@ -1,9 +1,6 @@
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// Copyright (c) Sandeep Mistry. All rights reserved.
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// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
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		||||
// Licensed under the MIT license.
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// Modifications and additions copyright 2024 by Mark Qvist
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// Obviously still under the MIT license.
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#ifndef SX1276_H
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#define SX1276_H
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										105
									
								
								sx128x.cpp
									
									
									
									
									
								
							
							
						
						
									
										105
									
								
								sx128x.cpp
									
									
									
									
									
								
							@@ -1,12 +1,11 @@
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// Copyright (c) Sandeep Mistry. All rights reserved.
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// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
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		||||
// Licensed under the MIT license.
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		||||
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// Modifications and additions copyright 2024 by Mark Qvist & Jacob Eva
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		||||
// Obviously still under the MIT license.
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#include "sx128x.h"
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#include "Boards.h"
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#if MODEM == SX1280
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#include "sx128x.h"
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#define MCU_1284P 0x91
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#define MCU_2560  0x92
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#define MCU_ESP32 0x81
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@@ -44,19 +43,19 @@
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#define OP_STANDBY_8X               0x80
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#define OP_TX_8X                    0x83
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#define OP_RX_8X                    0x82
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#define OP_SET_IRQ_FLAGS_8X         0x8D // also provides info such as
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#define OP_SET_IRQ_FLAGS_8X         0x8D // Also provides info such as
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                                         // preamble detection, etc for
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                                         // knowing when it's safe to switch
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                                         // antenna modes
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#define OP_CLEAR_IRQ_STATUS_8X      0x97
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#define OP_GET_IRQ_STATUS_8X        0x15
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#define OP_RX_BUFFER_STATUS_8X      0x17
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#define OP_PACKET_STATUS_8X         0x1D // get snr & rssi of last packet
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#define OP_PACKET_STATUS_8X         0x1D // Get snr & rssi of last packet
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#define OP_CURRENT_RSSI_8X          0x1F
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#define OP_MODULATION_PARAMS_8X     0x8B // bw, sf, cr, etc.
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#define OP_PACKET_PARAMS_8X         0x8C // crc, preamble, payload length, etc.
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#define OP_MODULATION_PARAMS_8X     0x8B // BW, SF, CR, etc.
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#define OP_PACKET_PARAMS_8X         0x8C // CRC, preamble, payload length, etc.
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#define OP_STATUS_8X                0xC0
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#define OP_TX_PARAMS_8X             0x8E // set dbm, etc
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#define OP_TX_PARAMS_8X             0x8E // Set dbm, etc
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#define OP_PACKET_TYPE_8X           0x8A
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#define OP_BUFFER_BASE_ADDR_8X      0x8F
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#define OP_READ_REGISTER_8X         0x19
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@@ -73,9 +72,9 @@
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#define OP_FIFO_READ_8X             0x1B
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#define IRQ_PREAMBLE_DET_MASK_8X    0x80
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#define REG_PACKET_SIZE            0x901
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#define REG_FIRM_VER_MSB           0x154
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#define REG_FIRM_VER_LSB           0x153
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#define REG_PACKET_SIZE             0x901
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#define REG_FIRM_VER_MSB            0x154
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#define REG_FIRM_VER_LSB            0x153
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#define XTAL_FREQ_8X (double)52000000
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#define FREQ_DIV_8X (double)pow(2.0, 18.0)
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@@ -93,24 +92,8 @@ extern SPIClass SPI;
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sx128x::sx128x() :
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  _spiSettings(8E6, MSBFIRST, SPI_MODE0),
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  _ss(LORA_DEFAULT_SS_PIN), _reset(LORA_DEFAULT_RESET_PIN), _dio0(LORA_DEFAULT_DIO0_PIN), _rxen(pin_rxen), _busy(LORA_DEFAULT_BUSY_PIN), _txen(pin_txen),
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  _frequency(0),
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  _txp(0),
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  _sf(0x05),
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  _bw(0x34),
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  _cr(0x01),
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  _packetIndex(0),
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  _implicitHeaderMode(0),
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  _payloadLength(255),
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  _crcMode(0),
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  _fifo_tx_addr_ptr(0),
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  _fifo_rx_addr_ptr(0),
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  _rxPacketLength(0),
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  _preinit_done(false),
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  _tcxo(false)
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{
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  // overide Stream timeout value
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  setTimeout(0);
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}
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  _frequency(0), _txp(0), _sf(0x05), _bw(0x34), _cr(0x01), _packetIndex(0), _implicitHeaderMode(0), _payloadLength(255), _crcMode(0), _fifo_tx_addr_ptr(0),
 | 
			
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  _fifo_rx_addr_ptr(0), _rxPacketLength(0), _preinit_done(false), _tcxo(false) { setTimeout(0); }
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bool ISR_VECT sx128x::getPacketValidity() {
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    uint8_t buf[2];
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@@ -472,23 +455,17 @@ float ISR_VECT sx128x::packetSnr() {
 | 
			
		||||
}
 | 
			
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 | 
			
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long sx128x::packetFrequencyError() {
 | 
			
		||||
  // TODO: implement this, page 120 of sx1280 datasheet
 | 
			
		||||
  // TODO: Implement this, page 120 of sx1280 datasheet
 | 
			
		||||
  int32_t freqError = 0;
 | 
			
		||||
  const float fError = 0.0;
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		||||
  return static_cast<long>(fError);
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		||||
}
 | 
			
		||||
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void sx128x::flush() { }
 | 
			
		||||
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		||||
int ISR_VECT sx128x::available() { return _rxPacketLength - _packetIndex; }
 | 
			
		||||
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size_t sx128x::write(uint8_t byte) { return write(&byte, sizeof(byte)); }
 | 
			
		||||
 | 
			
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size_t sx128x::write(const uint8_t *buffer, size_t size) {
 | 
			
		||||
  if ((_payloadLength + size) > MAX_PKT_LENGTH) {
 | 
			
		||||
      size = MAX_PKT_LENGTH - _payloadLength;
 | 
			
		||||
  }
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		||||
 | 
			
		||||
  if ((_payloadLength + size) > MAX_PKT_LENGTH) { size = MAX_PKT_LENGTH - _payloadLength; }
 | 
			
		||||
  writeBuffer(buffer, size);
 | 
			
		||||
  _payloadLength = _payloadLength + size;
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		||||
  return size;
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		||||
@@ -716,7 +693,7 @@ void sx128x::setTxPower(int level, int outputPin) {
 | 
			
		||||
      }
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		||||
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      tx_buf[0] = reg_value + 18;
 | 
			
		||||
      tx_buf[1] = 0xE0; // ramping time - 20 microseconds
 | 
			
		||||
      tx_buf[1] = 0xE0; // Ramping time, 20 microseconds
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		||||
      executeOpcode(OP_TX_PARAMS_8X, tx_buf, 2);
 | 
			
		||||
 | 
			
		||||
    // T3S3 SX1280 PA
 | 
			
		||||
@@ -795,7 +772,7 @@ void sx128x::setTxPower(int level, int outputPin) {
 | 
			
		||||
          break;
 | 
			
		||||
      }
 | 
			
		||||
      tx_buf[0] = reg_value;
 | 
			
		||||
      tx_buf[1] = 0xE0; // ramping time - 20 microseconds
 | 
			
		||||
      tx_buf[1] = 0xE0; // Ramping time, 20 microseconds
 | 
			
		||||
 | 
			
		||||
    // For SX1280 boards with no specific PA requirements
 | 
			
		||||
    #else
 | 
			
		||||
@@ -803,7 +780,7 @@ void sx128x::setTxPower(int level, int outputPin) {
 | 
			
		||||
      else if (level < -18) { level = -18; }
 | 
			
		||||
      _txp = level;
 | 
			
		||||
      tx_buf[0] = level + 18;
 | 
			
		||||
      tx_buf[1] = 0xE0; // ramping time - 20 microseconds
 | 
			
		||||
      tx_buf[1] = 0xE0; // Ramping time, 20 microseconds
 | 
			
		||||
    #endif
 | 
			
		||||
    
 | 
			
		||||
    executeOpcode(OP_TX_PARAMS_8X, tx_buf, 2);
 | 
			
		||||
@@ -821,7 +798,7 @@ void sx128x::setFrequency(uint32_t frequency) {
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
uint32_t sx128x::getFrequency() {
 | 
			
		||||
  // we can't read the frequency on the sx1280
 | 
			
		||||
  // We can't read the frequency on the sx1280
 | 
			
		||||
  uint32_t frequency = _frequency;
 | 
			
		||||
  return frequency;
 | 
			
		||||
}
 | 
			
		||||
@@ -847,12 +824,6 @@ uint32_t sx128x::getSignalBandwidth() {
 | 
			
		||||
  return 0;
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
// TODO: Is this needed for SX1280?
 | 
			
		||||
void sx128x::handleLowDataRate() { }
 | 
			
		||||
 | 
			
		||||
// TODO: Check if there's anything the sx1280 can do here
 | 
			
		||||
void sx128x::optimizeModemSensitivity() { }
 | 
			
		||||
 | 
			
		||||
void sx128x::setSignalBandwidth(uint32_t sbw) {
 | 
			
		||||
  if      (sbw <= 203.125E3) { _bw = 0x34; }
 | 
			
		||||
  else if (sbw <= 406.25E3)  { _bw = 0x26; }
 | 
			
		||||
@@ -872,40 +843,22 @@ void sx128x::setCodingRate4(int denominator) {
 | 
			
		||||
  setModulationParams(_sf, _bw, _cr);
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void sx128x::handleLowDataRate() { } // TODO: Is this needed for SX1280?
 | 
			
		||||
void sx128x::optimizeModemSensitivity() { } // TODO: Check if there's anything the sx1280 can do here
 | 
			
		||||
uint8_t sx128x::getCodingRate4() { return _cr + 4; }
 | 
			
		||||
 | 
			
		||||
void sx128x::setPreambleLength(long length) {
 | 
			
		||||
  _preambleLength = length;
 | 
			
		||||
  setPacketParams(length, _implicitHeaderMode, _payloadLength, _crcMode);
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
// TODO: Implement
 | 
			
		||||
void sx128x::setSyncWord(int sw) { }
 | 
			
		||||
 | 
			
		||||
// TODO: need to check how to implement on sx1280
 | 
			
		||||
void sx128x::enableTCXO() { }
 | 
			
		||||
 | 
			
		||||
// TODO: need to check how to implement on sx1280
 | 
			
		||||
void sx128x::disableTCXO() { }
 | 
			
		||||
 | 
			
		||||
void sx128x::setPreambleLength(long length) { _preambleLength = length; setPacketParams(length, _implicitHeaderMode, _payloadLength, _crcMode); }
 | 
			
		||||
void sx128x::setSyncWord(int sw) { } // TODO: Implement
 | 
			
		||||
void sx128x::enableTCXO() { } // TODO: Need to check how to implement on sx1280
 | 
			
		||||
void sx128x::disableTCXO() { } // TODO: Need to check how to implement on sx1280
 | 
			
		||||
void sx128x::sleep() { uint8_t byte = 0x00; executeOpcode(OP_SLEEP_8X, &byte, 1); }
 | 
			
		||||
 | 
			
		||||
uint8_t sx128x::getTxPower() { return _txp; }
 | 
			
		||||
 | 
			
		||||
uint8_t sx128x::getSpreadingFactor() { return _sf; }
 | 
			
		||||
 | 
			
		||||
void sx128x::enableCrc() { _crcMode = 0x20; setPacketParams(_preambleLength, _implicitHeaderMode, _payloadLength, _crcMode); }
 | 
			
		||||
 | 
			
		||||
void sx128x::disableCrc() { _crcMode = 0; setPacketParams(_preambleLength, _implicitHeaderMode, _payloadLength, _crcMode); }
 | 
			
		||||
 | 
			
		||||
void sx128x::setSPIFrequency(uint32_t frequency) { _spiSettings = SPISettings(frequency, MSBFIRST, SPI_MODE0); }
 | 
			
		||||
 | 
			
		||||
void sx128x::explicitHeaderMode() {  _implicitHeaderMode = 0; setPacketParams(_preambleLength, _implicitHeaderMode, _payloadLength, _crcMode); }
 | 
			
		||||
 | 
			
		||||
void sx128x::implicitHeaderMode() { _implicitHeaderMode = 0x80; setPacketParams(_preambleLength, _implicitHeaderMode, _payloadLength, _crcMode); }
 | 
			
		||||
void sx128x::dumpRegisters(Stream& out) { for (int i = 0; i < 128; i++) { out.print("0x"); out.print(i, HEX); out.print(": 0x"); out.println(readRegister(i), HEX); } }
 | 
			
		||||
 | 
			
		||||
void sx128x::dumpRegisters(Stream& out) { 
 | 
			
		||||
  for (int i = 0; i < 128; i++) { out.print("0x"); out.print(i, HEX); out.print(": 0x"); out.println(readRegister(i), HEX); }
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
sx128x sx128x_modem;
 | 
			
		||||
sx128x sx128x_modem;
 | 
			
		||||
#endif
 | 
			
		||||
							
								
								
									
										21
									
								
								sx128x.h
									
									
									
									
									
								
							
							
						
						
									
										21
									
								
								sx128x.h
									
									
									
									
									
								
							@@ -1,9 +1,6 @@
 | 
			
		||||
// Copyright (c) Sandeep Mistry. All rights reserved.
 | 
			
		||||
// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
 | 
			
		||||
// Licensed under the MIT license.
 | 
			
		||||
 | 
			
		||||
// Modifications and additions copyright 2024 by Mark Qvist
 | 
			
		||||
// Obviously still under the MIT license.
 | 
			
		||||
 | 
			
		||||
#ifndef SX128X_H
 | 
			
		||||
#define SX128X_H
 | 
			
		||||
 | 
			
		||||
@@ -11,18 +8,16 @@
 | 
			
		||||
#include <SPI.h>
 | 
			
		||||
#include "Modem.h"
 | 
			
		||||
 | 
			
		||||
#define LORA_DEFAULT_SS_PIN    10
 | 
			
		||||
#define LORA_DEFAULT_RESET_PIN 9
 | 
			
		||||
#define LORA_DEFAULT_DIO0_PIN  2
 | 
			
		||||
#define LORA_DEFAULT_SS_PIN     10
 | 
			
		||||
#define LORA_DEFAULT_RESET_PIN  9
 | 
			
		||||
#define LORA_DEFAULT_DIO0_PIN   2
 | 
			
		||||
#define LORA_DEFAULT_RXEN_PIN  -1
 | 
			
		||||
#define LORA_DEFAULT_TXEN_PIN  -1
 | 
			
		||||
#define LORA_DEFAULT_BUSY_PIN  -1
 | 
			
		||||
#define LORA_MODEM_TIMEOUT_MS 15E3
 | 
			
		||||
 | 
			
		||||
#define PA_OUTPUT_RFO_PIN      0
 | 
			
		||||
#define PA_OUTPUT_PA_BOOST_PIN 1
 | 
			
		||||
 | 
			
		||||
#define RSSI_OFFSET 157
 | 
			
		||||
#define LORA_MODEM_TIMEOUT_MS   15E3
 | 
			
		||||
#define PA_OUTPUT_RFO_PIN       0
 | 
			
		||||
#define PA_OUTPUT_PA_BOOST_PIN  1
 | 
			
		||||
#define RSSI_OFFSET             157
 | 
			
		||||
 | 
			
		||||
class sx128x : public Stream {
 | 
			
		||||
public:
 | 
			
		||||
 
 | 
			
		||||
		Reference in New Issue
	
	Block a user